1. Field of the Invention
The present invention relates to a semiconductor apparatus, and in particular, to a semiconductor apparatus in which a transistor using a high dielectric constant film whose dielectric constant is greater than that of a conventional gate insulating film for a gate structure is formed in a semiconductor substrate, and a method of manufacturing the semiconductor apparatus.
2. Description of the Related Art
In recent years, elements have become minute due to the high-integration and increase in speed of semiconductor apparatuses such as a large-scale integration (LSI). Accompanying these, in a NOS structure which is a component of a function device such as a capacitor or a transistor, it has been required that an SiO2 gate insulating film is further made thinner. However, when a film thickness of a silicon oxide film is less than or equal to 3 nm, because electrons come to bring about direct tunneling in an electric field region where the device operates, the problem that a leakage current is increased and an electric power consumption of the device is increased is brought about. Therefore, a next-generation gate insulating film which can be replaced with the silicon oxide film has been required. Then, recently, a high dielectric constant film whose relative dielectric constant is higher than that of the silicon oxide film has been paid attention. The reason for this is that the high dielectric constant film with a film thickness thicker than that of the silicon oxide film can obtain the same capacitance as that of the silicon oxide film. Due to the film thickness of an insulating film being made thicker, it is possible to reduce a probability in which electrons tunnel through the insulating film, i.e., it is possible to suppress the generation of a tunnel current.
Then, as a high dielectric constant gate insulating film replaced with an SiO2 film, for example, a hafnium silicate (Hf-silicate) film or the like is cited as a candidate. Further, a generally used manufacturing method such as a chemical vapor deposition (CVD) method is preferably used at the time of manufacturing a large-scale integration (LSI).
When a manufacturing method which has been generally used is used, it is necessary to use a general silicon as a gate electrode. However, when a silicon gate is used, a fixed charge is generated in the vicinity of the interface between the silicon gate electrode and the hafnium silicate gate insulating film. Accordingly, in particular, in a case of a p-channel metal oxide semiconductor (MOS) transistor, a change in a threshold value of 0.6 V or more than an ideal value arises. Therefore, there has been the problem that it is difficult to design the LSI.
As a prior art using a high dielectric constant film as a gate insulating film, in Jpn. Pat. Appln. KOKAI Publication No. 2003-152101, there is disclosed that a high dielectric substance whose relative dielectric constant is greater than that of a silicon nitride film, for example, a group 4A elemental oxide such as a ZrO2 film or an HfO2 film, a Ta2O5 film or the like is used as a gate insulating film. Further, in Jpn. Pat. Appln. KOKAI Publication No. 2002-170825, there is disclosed that a gate insulating film is formed by combining a silicon oxide/nitride film with a relative dielectric constant of 5 to 7 and a high dielectric constant film (an oxide of a metal such as Zr, Hf, La, Ti, Ta, Y or Al). Furthermore, in Jpn. Pat. Appln. KOKAI Publication No. 2002-280461, there is disclosed that a gate insulating film is composed of a first insulating film which is a low dielectric constant film and a second insulating film which is a high dielectric constant film. One of a silicon oxide film, a silicon nitride film, and a silicon oxide/nitride film is used as the low dielectric constant film, and one of TiO2, ZrO2, HfO2, PrO2, and the like, or a mixture of two or more thereof is used as the high dielectric constant film.
As described above, when a manufacturing method which has been generally used is used, it is necessary to use a general silicon as a gate electrode. However, when a silicon gate is used, a fixed charge is generated in the vicinity of the interface between the silicon gate electrode and the hafnium silicate gate insulating film. Accordingly, in particular, in a case of a p-channel metal oxide semiconductor (MOS) transistor, a change in a threshold value of 0.6 V or more than an ideal value arises. Therefore, there has been the problem that it is difficult to design the LSI.